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 MC33566 Smart Voltage Regulator for Peripheral Card Applications
The MC33566 Low Dropout Regulator is designed for computer peripheral card applications complying with the instantly available requirements as specified by ACPI objectives. The MC33566 permits glitch-free transitions from "sleep" to "active" system modes and has internal logic circuitry to detect whether the system is being powered from the motherboard main 5V power supply or the 3.3V aux supply. The MC33566 provides a regulated output voltage of 3.3V via either an internal low dropout 5.0V-to-3.3V voltage regulator or an external P-channel MOSFET, depending on the operating status of the system in which the card is installed. During normal operating mode (5V main supply available) the 3.3V output is provided from the internal low dropout regulator at an output current of 1.2A. When the motherboard enters sleep mode, the MC33566 operates from the 3.3V aux supply and routes the aux current to the output via the external P-channel MOSFET bypass transistor controlled by the drive out pin. As a result, the output voltage provided to the peripheral card remains constant at 3.3V even during host systems transitions to and from sleep mode.
MC33566 Features: http://onsemi.com
1 5
D2PAK D2T SUFFIX CASE 936A
PIN CONNECTIONS
Pin 1 2 3 4 5 Function Vaux Vin Gnd Vout Drv
* * * * * *
Output current up to 1.2A Excellent Line and Load Regulation Low Dropout Voltage Prevents reverse current flow during sleep mode Glitch-free transfer from sleep mode to active mode Compatible with Instantly Available PC systems
+3.3 Vaux
12345
Note: Tab is ground
Simplified Block Diagram
ORDERING INFORMATION
Device MC33566D2T-1 Package D2PAK Shipping 50 Units / Rail
Compensation & Hysteresis
Hyst sw Comp Driver Drive out
External P-channel MOSFET
+3.3 Vout 5V detect Ref & Detect Vref
+3.3 Vout +5 Vin External 4.7 F cap
LDO
(c) Semiconductor Components Industries, LLC, 1999
1
January, 2000 - Rev. 0
Publication Order Number: MC33566/D
MC33566
MAXIMUM RATINGS (TC = 25C, unless otherwise noted)
Parameter +5 Vin Supply Voltage Symbol Vin Vin Operating Ambient Temperature Operating Junction Temperature Lead Temperature (Soldering, 10 seconds) Storage Temperature Package Thermal Resistance NOTES: 1. 2. Ta TJ TL Tstg RJA1 Max Value 7.0 -0.52 -5 to +85 - 5 to +150 300 - 55 to +150 65 Unit Vdc Vdc C C C C C/W
Mounted on recommended minimum PCB pad on FR4, 2-oz. copper circuit board. Vin should not be allowed to go negative relative to ground.
DEVICE MARKING
Device MC33566D2T-1 Type 3.3 V @ 1.2A Marking (1st Line) M5661
PIN ASSIGNMENTS AND FUNCTIONS
PIN # 1 2 3 4 5 PIN NAME +3.3 Vaux +5 Vin Gnd +3.3 Vout Drive out Auxiliary input. Typical voltage 3.3 V. This is the input supply for the IC. Typical voltage 5 V. (2) (3) Logic and power ground. 3.3V output provided to the application circuit (output current is sourced to this pin from the 5V input.) This output drives a P-channel MOSFET with up to 2000pF of "effective" gate capacitance. Recommended devices are the MMFT5P03HD and MTSF1P02HD. Drive out has active internal pull-up and pull-down circuitry to guarantee fast transitions. PIN DESCRIPTION
AC ELECTRICAL SPECIFICATIONS(1) (4) (5)
Parameter Drive High Delay (Vin ramping up) Cdrive = 1.2 nF, measured from +5 Vin = VthresHi to VDrive = 2V Drive Low Delay (Vin ramping down) Cdrive = 1.2 nF, measured from +5 Vin = VthresLo to VDrive = 2V Symbol tDH tDL Min Typ 0.5 0.5 Max 3.5 3.5 Unit S S
NOTES: (1.) AC specs are guaranteed by characterization, but not production tested after characterization. (2.) See 5V Detect Thresholds Diagram. (3.) Recommended source impedance for 5V supply: 0.12W. This will ensure that Io x Rsource < Vhyst, thus avoiding driveout toggling during 5V detect threshold transitions. (4.) See Figure 2. Application Block Diagram. (5.) See Timing Diagram.
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MC33566
DC ELECTRICAL CHARACTERISTICS(1)
Characteristic +5 Vin Supply Voltage Range Reverse Leakage Current from Output Vaux quiescent current +5 Vin quiescent current, operating Load Capacitance(2) Symbol +5 Vin Ireverse Iqaux Iqvin Cload Min 4.35 -- -- -- 4.7 Typ 5.0 -- -- -- 22 Max 5.5 25 2.0 10 -- Unit Vdc A mA mA
mF
Vdc
REGULATOR OUTPUT
Output Voltage (4.35V Vin 5.5V, 0mA Io 400mA) TA = 25C (TJ = -5C to 150C) In-to-Out Voltage (3.9V Vin 4.35V, Vaux = 3.3V) Voltage Out at Max Voltage In (Vin = 7V) Line Regulation (Io = 400 mA) Load Regulation (Io = 0 to 400 mA) +3.3 Vout 3.267 3.234 Vd Voutmax Linereg Loadreg 3.0 3.1 -- -- 3.30 3.30 -- 3.3 -- -- 3.333 3.366 -- 3.5 0.4 0.8 Vdc Vdc % %
5V DETECT
Low Threshold Voltage (+5 Vin falling, Io = 400 mA) High Threshold Voltage (+5 Vin rising, Io = 400 mA) Hysteresis VthresLo VthresHi Vhyst 3.9 -- 0.05 4.05 4.2 -- -- 4.35 -- Vdc Vdc Vdc
DRIVE OUTPUT
Output peak source Current (+5 Vin > VthresHi) Output peak sink Current (+5 Vin < VthresLo) Low Output Voltage (IoL = 200 A, Vin < VthresLo) High Output Voltage (IoH = 200 A)
NOTE: 1. (-5CIpeak Ipeak VoL VoH
15 15 -- 3.4
-- -- 100 --
-- -- 200 --
mA mA mVdc Vdc
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MC33566
+3.3 Vaux
Compensation & Hysteresis
Hyst sw Comp Driver Drive out
External P-channel MOSFET
5V detect Ref & Detect Vref
+3.3 Vout
+3.3 Vout +5 Vin
LDO
External 4.7 F cap
Figure 1. Functional Block Diagram
FUNCTIONAL DESCRIPTION Glitch-free Transfer - The design of the 5V detect Input Blocking - The internal NPN pass transistor of the circuitry and drive out control circuitry guarantees that the LDO regulator ensures that no significant reverse current +3.3 Vout will not exceed the output voltage specification will flow from +3.3 Vout back to the +5 Vin input when the listed in the table of DC Operating Specifications even with 5V input is not powered and the 3.3 Vin supply is present. +5 Vin ramping up and down at the extremes of the slew rates 5 Volt Detect - Internal circuitry detects the presence of in the table of AC Operating Specifications. the 5V input supply. When the 5V supply drops below a Offset Voltage Performance - To ensure performance given threshold, the +3.3 Vin bypass transistor (an external when external offsets are present on the +5 Vin and +3.3 Vin P-channel MOSFET) is enabled. The 5V detect logic is power inputs, the device has been designed to be capable of active throughout the entire range of ramp-up from 0 to operating with either one or both of these inputs rising from 5.5V. Additionally, the drive out signal is never turned ON or falling to zero volts, or with offsets of 0.05V to 0.9V as or OFF inappropriately during ramp-up of the +5 Vin the inputs ramp up and down. supply. Also, +3.3 Vout never drops below 3.0V while +5 Vin is above the 5V detect minimum threshold.
3.3V aux
Motherboard/ Mainboard PCI Slot
5V PCI Card Circuitry
4.7 F
5432 DVGV RON I DN 1 V A U X
Figure 2. Application Block Diagram
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MC33566
4.4V VIN VTH(HI) VTH(LO) 3.8V 3.8V tDH tDL VHYST VIN 4.4V
DR
2.0V
2.0V
DR
2.0V
2.0V
NOTE: (1) Vin rise and fall times (10% to 90%) to be 100s.
NOTE: (1) Vin rise and fall times (10% to 90%) to be 100ns.
Figure 3. 5V Detect Thresholds Diagram
Figure 4. Timing Diagram
200 Vout capacitor 5F 20mW ESR Phase Margin or Gain (dB) Phase Margin or Gain (dB)
200 Vout capacitor 5F 20mW ESR
100
Phase Margin
100
Phase Margin
Gain dB
Gain dB
0 101
103 Frequency (Hz)
105
0 101
103 Frequency (Hz)
105
NOTE: Vout capacitor 4.7F over operating temperature range. Maximum ESR permissable = 500mW over operating temperature range.
Figure 5. Predicted Gain and Phase at Zero Load Current
Figure 6. Predicted Gain and Phase at Full Load Current
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MC33566
PACKAGE DIMENSIONS
(D2PAK) D2T SUFFIX PLASTIC PACKAGE CASE 936A-02 ISSUE A -T- A K B
12345 OPTIONAL CHAMFER TERMINAL 6
E
U V
S H M L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.067 BSC 0.539 0.579 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 _ REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.702 BSC 13.691 14.707 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 _ REF 2.946 REF 5.080 MIN 6.350 MIN
D 0.010 (0.254)
M
T
N G R
P
C
DIM A B C D E G H K L M N P R S U V
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MC33566
Notes
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MC33566
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
North America Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 2:30pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 2:30pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 1:30pm to 5:00pm UK Time) Email: ONlit@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong 800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-8549 Phone: 81-3-5740-2745 Email: r14525@onsemi.com Fax Response Line: 303-675-2167 800-344-3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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MC33566/D


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